As input-output (I/O) transceivers operate at higher frequencies, voltage and timing margins become smaller and harder to meet for a given design. Furthermore, high degree of random variation (also referred to as within-die variation) in modern process technology results in excessive variations in voltage swing and duty cycle of signals transmitted by the I/O transceivers on transmission media. Identical I/O transceivers (i.e., transceivers with identical designs and transistor sizes) may exhibit different signaling attributes within internal nodes and at the outputs of their respective I/O pads e.g., the voltage swing and duty cycle of a signal generated by a first I/O transceiver of a processor may be different from the voltage swing and duty cycle of another signal generated by a second I/O transceiver of the processor, even when the second I/O transceiver being physically located next to the first I/O transceiver.
Such variability in the voltage swing and duty cycle of signals at the I/O pads result in reduced performance of the processor—performance as measured in terms of overall I/O speeds and satisfaction of I/O specifications of the processor.
Furthermore, characterizing various attributes of such high speed devices (e.g., the devices of the high speed I/Os) require expensive debugging testers. To reduce the cost and test time such high speed devices, on-die processor self-testing measures are applied. Traditional analog to digital (A2D) converters can be used to measure a single analog attribute of a device e.g., current levels of a current source of an I/O transmitter, to characterize the device. However, such A2D converters are unable to measure multiple internal analog and digital attributes of a device e.g., current levels flowing through a node, duty-cycle of a high-speed node, phase difference between two different high-speed nodes, voltage level of a signal on a node.